C Specification
The VkMemoryBarrier2
structure is defined as:
typedef struct VkMemoryBarrier2 {
VkStructureType sType;
const void* pNext;
VkPipelineStageFlags2 srcStageMask;
VkAccessFlags2 srcAccessMask;
VkPipelineStageFlags2 dstStageMask;
VkAccessFlags2 dstAccessMask;
} VkMemoryBarrier2;
or the equivalent
// Provided by VK_KHR_synchronization2
typedef VkMemoryBarrier2 VkMemoryBarrier2KHR;
Members
-
sType
is a VkStructureType value identifying this structure. -
pNext
isNULL
or a pointer to a structure extending this structure. -
srcStageMask
is a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope. -
srcAccessMask
is a VkAccessFlags2 mask of access flags to be included in the first access scope. -
dstStageMask
is a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope. -
dstAccessMask
is a VkAccessFlags2 mask of access flags to be included in the second access scope.
Description
This structure defines a memory dependency affecting all device memory.
The first synchronization scope and
access scope described by
this structure include only operations and memory accesses specified by
srcStageMask
and srcAccessMask
.
The second synchronization scope
and access scope described
by this structure include only operations and memory accesses specified by
dstStageMask
and dstAccessMask
.
-
VUID-VkMemoryBarrier2-srcStageMask-03929
If thegeometryShader
feature is not enabled,srcStageMask
must not containVK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
-
VUID-VkMemoryBarrier2-srcStageMask-03930
If thetessellationShader
feature is not enabled,srcStageMask
must not containVK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT
orVK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
-
VUID-VkMemoryBarrier2-srcStageMask-07317
If theattachmentFragmentShadingRate
feature is not enabled,srcStageMask
must not containVK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
-
VUID-VkMemoryBarrier2-srcAccessMask-03900
IfsrcAccessMask
includesVK_ACCESS_2_INDIRECT_COMMAND_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03901
IfsrcAccessMask
includesVK_ACCESS_2_INDEX_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_INDEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03902
IfsrcAccessMask
includesVK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT
,VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03903
IfsrcAccessMask
includesVK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT
,VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03904
IfsrcAccessMask
includesVK_ACCESS_2_UNIFORM_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-03905
IfsrcAccessMask
includesVK_ACCESS_2_SHADER_SAMPLED_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-03906
IfsrcAccessMask
includesVK_ACCESS_2_SHADER_STORAGE_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-03907
IfsrcAccessMask
includesVK_ACCESS_2_SHADER_STORAGE_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-07454
IfsrcAccessMask
includesVK_ACCESS_2_SHADER_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-03909
IfsrcAccessMask
includesVK_ACCESS_2_SHADER_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-srcAccessMask-03910
IfsrcAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03911
IfsrcAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03912
IfsrcAccessMask
includesVK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03913
IfsrcAccessMask
includesVK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03914
IfsrcAccessMask
includesVK_ACCESS_2_TRANSFER_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
,VK_PIPELINE_STAGE_2_RESOLVE_BIT
,VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03915
IfsrcAccessMask
includesVK_ACCESS_2_TRANSFER_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
,VK_PIPELINE_STAGE_2_RESOLVE_BIT
,VK_PIPELINE_STAGE_2_CLEAR_BIT
,VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03916
IfsrcAccessMask
includesVK_ACCESS_2_HOST_READ_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_HOST_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03917
IfsrcAccessMask
includesVK_ACCESS_2_HOST_WRITE_BIT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_HOST_BIT
-
VUID-VkMemoryBarrier2-srcAccessMask-03926
IfsrcAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT
,srcStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstStageMask-03929
If thegeometryShader
feature is not enabled,dstStageMask
must not containVK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT
-
VUID-VkMemoryBarrier2-dstStageMask-03930
If thetessellationShader
feature is not enabled,dstStageMask
must not containVK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT
orVK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT
-
VUID-VkMemoryBarrier2-dstStageMask-07317
If theattachmentFragmentShadingRate
feature is not enabled,dstStageMask
must not containVK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
-
VUID-VkMemoryBarrier2-dstAccessMask-03900
IfdstAccessMask
includesVK_ACCESS_2_INDIRECT_COMMAND_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03901
IfdstAccessMask
includesVK_ACCESS_2_INDEX_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_INDEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03902
IfdstAccessMask
includesVK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT
,VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03903
IfdstAccessMask
includesVK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT
,VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03904
IfdstAccessMask
includesVK_ACCESS_2_UNIFORM_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-03905
IfdstAccessMask
includesVK_ACCESS_2_SHADER_SAMPLED_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-03906
IfdstAccessMask
includesVK_ACCESS_2_SHADER_STORAGE_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-03907
IfdstAccessMask
includesVK_ACCESS_2_SHADER_STORAGE_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-07454
IfdstAccessMask
includesVK_ACCESS_2_SHADER_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-03909
IfdstAccessMask
includesVK_ACCESS_2_SHADER_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
, or one of theVK_PIPELINE_STAGE_*_SHADER_BIT
stages -
VUID-VkMemoryBarrier2-dstAccessMask-03910
IfdstAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03911
IfdstAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03912
IfdstAccessMask
includesVK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03913
IfdstAccessMask
includesVK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT
,VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03914
IfdstAccessMask
includesVK_ACCESS_2_TRANSFER_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
,VK_PIPELINE_STAGE_2_RESOLVE_BIT
,VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03915
IfdstAccessMask
includesVK_ACCESS_2_TRANSFER_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_COPY_BIT
,VK_PIPELINE_STAGE_2_BLIT_BIT
,VK_PIPELINE_STAGE_2_RESOLVE_BIT
,VK_PIPELINE_STAGE_2_CLEAR_BIT
,VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT
,VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03916
IfdstAccessMask
includesVK_ACCESS_2_HOST_READ_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_HOST_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03917
IfdstAccessMask
includesVK_ACCESS_2_HOST_WRITE_BIT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_HOST_BIT
-
VUID-VkMemoryBarrier2-dstAccessMask-03926
IfdstAccessMask
includesVK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT
,dstStageMask
must includeVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT
VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT
, orVK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-sType-sType
sType
must beVK_STRUCTURE_TYPE_MEMORY_BARRIER_2
-
VUID-VkMemoryBarrier2-srcStageMask-parameter
srcStageMask
must be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryBarrier2-srcAccessMask-parameter
srcAccessMask
must be a valid combination of VkAccessFlagBits2 values -
VUID-VkMemoryBarrier2-dstStageMask-parameter
dstStageMask
must be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryBarrier2-dstAccessMask-parameter
dstAccessMask
must be a valid combination of VkAccessFlagBits2 values
Document Notes
For more information, see the Vulkan Specification
This page is extracted from the Vulkan Specification. Fixes and changes should be made to the Specification, not directly.