C Specification
The VkMemoryBarrier2 structure is defined as:
typedef struct VkMemoryBarrier2 {
VkStructureType sType;
const void* pNext;
VkPipelineStageFlags2 srcStageMask;
VkAccessFlags2 srcAccessMask;
VkPipelineStageFlags2 dstStageMask;
VkAccessFlags2 dstAccessMask;
} VkMemoryBarrier2;
// Provided by VK_KHR_synchronization2
// Equivalent to VkMemoryBarrier2
typedef VkMemoryBarrier2 VkMemoryBarrier2KHR;
Members
-
sTypeis a VkStructureType value identifying this structure. -
pNextisNULLor a pointer to a structure extending this structure. -
srcStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the first synchronization scope. -
srcAccessMaskis a VkAccessFlags2 mask of access flags to be included in the first access scope. -
dstStageMaskis a VkPipelineStageFlags2 mask of pipeline stages to be included in the second synchronization scope. -
dstAccessMaskis a VkAccessFlags2 mask of access flags to be included in the second access scope.
Description
This structure defines a memory dependency affecting all device memory.
The first synchronization scope and access scope described by this structure include only operations and memory accesses specified by the source stage mask and source access mask.
The second synchronization scope and access scope described by this structure include only operations and memory accesses specified by destination stage mask and destination access mask.
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VUID-VkMemoryBarrier2-srcStageMask-03929
If thegeometryShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT -
VUID-VkMemoryBarrier2-srcStageMask-03930
If thetessellationShaderfeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT -
VUID-VkMemoryBarrier2-srcStageMask-07317
If theattachmentFragmentShadingRatefeature is not enabled,srcStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
-
VUID-VkMemoryBarrier2-srcAccessMask-03900
IfsrcAccessMaskincludes VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03901
IfsrcAccessMaskincludes VK_ACCESS_2_INDEX_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03902
IfsrcAccessMaskincludes VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03903
IfsrcAccessMaskincludes VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT, VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03904
IfsrcAccessMaskincludes VK_ACCESS_2_UNIFORM_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-03905
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_SAMPLED_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-03906
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-03907
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-07454
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-03909
IfsrcAccessMaskincludes VK_ACCESS_2_SHADER_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-srcAccessMask-03910
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03911
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03912
IfsrcAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03913
IfsrcAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03914
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFER_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03915
IfsrcAccessMaskincludes VK_ACCESS_2_TRANSFER_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_CLEAR_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03916
IfsrcAccessMaskincludes VK_ACCESS_2_HOST_READ_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03917
IfsrcAccessMaskincludes VK_ACCESS_2_HOST_WRITE_BIT,srcStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryBarrier2-srcAccessMask-03926
IfsrcAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,srcStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
-
VUID-VkMemoryBarrier2-dstStageMask-03929
If thegeometryShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_GEOMETRY_SHADER_BIT -
VUID-VkMemoryBarrier2-dstStageMask-03930
If thetessellationShaderfeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_TESSELLATION_CONTROL_SHADER_BIT or VK_PIPELINE_STAGE_2_TESSELLATION_EVALUATION_SHADER_BIT -
VUID-VkMemoryBarrier2-dstStageMask-07317
If theattachmentFragmentShadingRatefeature is not enabled,dstStageMaskmust not contain VK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHR
-
VUID-VkMemoryBarrier2-dstAccessMask-03900
IfdstAccessMaskincludes VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03901
IfdstAccessMaskincludes VK_ACCESS_2_INDEX_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03902
IfdstAccessMaskincludes VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT, VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03903
IfdstAccessMaskincludes VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT, VK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03904
IfdstAccessMaskincludes VK_ACCESS_2_UNIFORM_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-03905
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_SAMPLED_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-03906
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-03907
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-07454
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-03909
IfdstAccessMaskincludes VK_ACCESS_2_SHADER_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, or one of theVK_PIPELINE_STAGE_*_SHADER_BITstages -
VUID-VkMemoryBarrier2-dstAccessMask-03910
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03911
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03912
IfdstAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03913
IfdstAccessMaskincludes VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT, VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03914
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFER_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03915
IfdstAccessMaskincludes VK_ACCESS_2_TRANSFER_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COPY_BIT, VK_PIPELINE_STAGE_2_BLIT_BIT, VK_PIPELINE_STAGE_2_RESOLVE_BIT, VK_PIPELINE_STAGE_2_CLEAR_BIT, VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03916
IfdstAccessMaskincludes VK_ACCESS_2_HOST_READ_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03917
IfdstAccessMaskincludes VK_ACCESS_2_HOST_WRITE_BIT,dstStageMaskmust include VK_PIPELINE_STAGE_2_HOST_BIT -
VUID-VkMemoryBarrier2-dstAccessMask-03926
IfdstAccessMaskincludes VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT,dstStageMaskmust include VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT VK_PIPELINE_STAGE_2_ALL_GRAPHICS_BIT, or VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT
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VUID-VkMemoryBarrier2-sType-sType
sTypemust be VK_STRUCTURE_TYPE_MEMORY_BARRIER_2 -
VUID-VkMemoryBarrier2-srcStageMask-parameter
srcStageMaskmust be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryBarrier2-srcAccessMask-parameter
srcAccessMaskmust be a valid combination of VkAccessFlagBits2 values -
VUID-VkMemoryBarrier2-dstStageMask-parameter
dstStageMaskmust be a valid combination of VkPipelineStageFlagBits2 values -
VUID-VkMemoryBarrier2-dstAccessMask-parameter
dstAccessMaskmust be a valid combination of VkAccessFlagBits2 values
Document Notes
For more information, see the Vulkan Specification.
This page is extracted from the Vulkan Specification. Fixes and changes should be made to the Specification, not directly.